| 摘要 |
A digital audio processor ( 20 ) is disclosed, in which digital filter coefficients associated with a plurality of sampling frequencies are stored in a plurality of coefficient memory banks ( 55 ). A controller in the digital audio processor ( 20 ) selects one of the coefficient memory banks ( 55 ) for use in the digital signal processing channels ( 44 ). In a manual mode, this selection is in response to a manual selection entry in a bank control register ( 41 ). In an automatic mode, indicated by a specific entry in the bank control register ( 41 ), sample rate detector circuitry ( 54 ) detects the sampling frequency relative to an external reference, such as a crystal (XTL); the appropriate one of the coefficient memory banks ( 55 ) is then selected based on sampling frequency associations stored in rate select register ( 43 ) in the controller ( 40 ).
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