发明名称 Efficient and flexible GPS receiver baseband architecture
摘要 The present invention provides a new baseband integrated circuit (IC) architecture for direct sequence spread spectrum (DSSS) communication receivers. The baseband IC has a single set of baseband correlators serving all channels in succession. No complex parallel channel hardware is required. A single on-chip code Numerically Controlled Oscillator (NCO) drives a pseudorandom number (PN) sequence generator, generates all code sampling frequencies, and is capable of self-correct through feedback from an off-chip processor. A carrier NCO generates corrected local frequencies. These on-chip NCOs generate all the necessary clocks. This architecture advantageously reduces the total hardware necessary for the receiver and the baseband IC thus can be realized with a minimal number of gate count. The invention can accommodate any number of channels in a navigational system such as the Global Positioning System (GPS), GLONASS, WAAS, LAAS, etc. The number of channels can be increased by increasing the circuit clock speed.
申请公布号 US2006251173(A1) 申请公布日期 2006.11.09
申请号 US20050123861 申请日期 2005.05.06
申请人 WANG HANSHENG;WANG CHI-SHIN 发明人 WANG HANSHENG;WANG CHI-SHIN
分类号 H04N11/04 主分类号 H04N11/04
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