<p>A NICAM encoder (54) comprises a NICAM processor (82) and a front-end section (80, 84) coupled to the NICAM processor. The front-end section is configured for operating with a system clock (68) that is integer divisible such that the system clock can be used by both the NICAM processor (82) and the front-end section (80, 84).</p>
申请公布号
WO2006119025(A1)
申请公布日期
2006.11.09
申请号
WO2006US16263
申请日期
2006.04.28
申请人
FREESCALE SEMICONDUCTOR, INC.;ZOSO, LUCIANO;CHIN, ALLAN, P.;LESTER, DAVID, P.
