HARDWARE IMPLEMENTATION OF A PROBABILISTIC INTERFERENCE METHOD BY MEANS OF VHDL EXEMPLIFIED FOR A DIAGNOSTIC SYSTEM

摘要

The invention relates to a method for establishing, using a junction tree, the topology and the dependencies within this secondary tree structure in a precompiled manner for hardware-relevant conversion. The precompiled data are used to establish the schematic processes which allow to implement FPGAs. The main emphasis is placed on developing a suitable storage format for the potential tables and for converting the algorithms, thereby allowing subsequent conversion into the hardware description language VHDL. For modeling uncertain knowledge, Bayesian networks (or junction trees) are used.