发明名称 |
Output circuit device for clock signal distribution |
摘要 |
<p>An output circuit device has an output circuit connected between a first power supply line and a second power supply line via a control circuit having at least one isolating transistor. A control voltage held at a constant level is applied to a control electrode of the isolating transistor, and the control voltage is a voltage at a level that works to attenuate high-frequency components contained in a voltage supplied from the first or the second power supply line.
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申请公布号 |
EP1378814(A3) |
申请公布日期 |
2006.11.02 |
申请号 |
EP20020029039 |
申请日期 |
2002.12.27 |
申请人 |
FUJITSU LIMITED |
发明人 |
TAMURA, HIROTAKA;KIBUNE, MASAYA |
分类号 |
G06F1/10;H03K5/00;G06F1/04;H03F3/45;H03K19/0175 |
主分类号 |
G06F1/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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