| 摘要 |
The invention describes an analyzing device for an embedded system ( 9 ), which has at least one CPU ( 1 ), at least one CPU bus ( 2 ), and at least one memory ( 3 ). The device includes a communication module ( 4 ) for the input or output of analysis data using a test interface ( 5 ), which, in addition to control lines, includes at least one group of data lines. The data words and the address words are transmitted alternately or in other succession by way of the test interface. This achieves the advantage of error detection while using few basic cycles of the CPU. |
