| 摘要 |
<p>An electronic data system comprising: a differential data system bus comprising true and complement signal wires; a write circuit for writing a Logic 0, a Logic 1 and a NULL state to the differential data system bus, wherein the NULL state is a state where Vdiff = 0; and a read circuit for reading the Logic 0, the Logic 1 and the NULL state from the the differential data system bus. In one embodiment, there are two differential data buses making a data bus pair, and at least one data bit is determined by an electronic state of the first bus and an electronic state of the second bus. In this embodiment, the write circuit is capable of placing each of the first and second data bus pairs in three electronic states for a total of nine possible electronic state combinations.</p> |
