| 摘要 |
PROBLEM TO BE SOLVED: To provide a chip type solid electrolytic capacitor that reduces ESR and has high welding connection reliability between a positive electrode lead wire and a positive electrode terminal. SOLUTION: In the chip type solid electrolytic capacitor, the positive electrode lead wires 12a, 12b are extracted from one end, capacitor elements 11a, 11b in which a negative electrode layer is formed on an outer surface that is different from extraction sections of the positive electrode lead wires 12a, 12b are placed side by side in a direction in parallel with a packaging surface, a planar positive electrode terminal 14 is welded and connected to the positive electrode lead wires 12a, 12b, and a planar negative electrode terminal is connected to the negative electrode layer. In the chip type solid electrolytic capacitor, the tip at the side of the positive electrode lead wire in the positive electrode terminal 14 has welded surfaces 17a, 17b separated by a cutout 16, the cutout 16 enters a position that is deeper than the tip of the positive electrode lead wires 12a, 12b, and the positive electrode lead wires 12a, 12b are welded and connected to the welded surfaces 17a, 17b, respectively. COPYRIGHT: (C)2007,JPO&INPIT
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