发明名称 Method of fabricating a transistor having a triple channel in a memory device
摘要 Disclosed is a method for fabricating a transistor of a memory device capable of preventing voids from being created when forming a low-resistant gate electrode. The method includes the steps of forming an active area by etching a semiconductor substrate, forming a field oxide layer in the semiconductor substrate and forming a recess by etching the field oxide layer. A gate insulation layer is formed along an upper surface of the active area and an exposed portion of the active area. A gate electrode is formed on the field oxide layer such that the gate electrode extends across an upper portion of the active area while being overlapped with a channel area and the recess. The first conductive layer to be patterned has the same thickness, so the low-resistant gate electrode is easily fabricated without forming the voids.
申请公布号 US2006246671(A1) 申请公布日期 2006.11.02
申请号 US20050155833 申请日期 2005.06.17
申请人 发明人 JANG SE A.;KIM YONG S.;OH JAE G.
分类号 H01L21/336;H01L21/76 主分类号 H01L21/336
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