发明名称 Adjusting power consumption of digital circuitry by generating frequency error representing error in propagation delay
摘要 A method and apparatus is disclosed for adjusting at least one of a supply voltage and a clocking frequency applied to digital circuitry of a computing device, wherein the digital circuitry comprises a critical path circuit. A propagation delay frequency representing a propagation delay of the critical path circuit is generated, and a frequency error signal is generated representing a difference between a reference frequency and the propagation delay frequency. At least one of the supply voltage and the clocking frequency is adjusted in response to the frequency error signal.
申请公布号 US7129763(B1) 申请公布日期 2006.10.31
申请号 US20040983382 申请日期 2004.11.08
申请人 WESTERN DIGITAL TECHNOLOGIES, INC. 发明人 BENNETT GEORGE J.;VASQUEZ STEVEN R.
分类号 H03L7/06;H03L7/00 主分类号 H03L7/06
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