Integrated electronic circuit for memory plan, has intermediate, metallization and stop layers, each made of dielectric materials in respective zones, where one material presents relative dielectric permittivity greater than that of other

摘要

The circuit has an intermediate layer (M0) placed between a surface (S0) of a substrate (100) and a metallization layer (M1), where the surface is covered by a stop layer (S10). Each of the intermediate, stop and metallization layers is constituted of two distinct dielectric materials in two zones, where the material in one zone presents a relative dielectric permittivity greater than that of the material in the other zone. An independent claim is also included for a method for fabricating an integrated electronic circuit.