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发明名称
CLOCK PHASE ADJUSTMENT METHOD, AND INTEGRATED CIRCUIT AND DESIGN METHOD THEREFOR
摘要
申请公布号
EP1156420(B1)
申请公布日期
2005.07.06
申请号
EP19990959827
申请日期
1999.12.15
申请人
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人
TOJIMA, MASAYOSHI;NAKAJIMA, HIROMASA;OOHASHI, MASAHIRO;KOHASHI, YASUO
分类号
G06F1/10;G06F17/50;G11C7/10;G11C7/22;(IPC1-7):G06F13/16
主分类号
G06F1/10
代理机构
代理人
主权项
地址
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