| 摘要 |
A multi-bit nonvolatile ferroelectric memory device comprises a plurality of memory cell arrays each including a plurality of multi-bit unit cells connected serially, and a correcting block adapted and configured to group the predetermined number of multi-bit unit cells in one memory group to store a data level signal corresponding to the same multi-bit data in each memory group at a write mode, and to convert data level signals of the selected memory group at a read mode into the multi-bit data and compare the multi-bit data in each bit to identify the same data bit as an effective data bit. As a result, the multi-bit nonvolatile ferroelectric memory device includes a fail cell repair circuit to effectively process randomly distributed cell data.
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