发明名称 System, method and program for designing a semiconductor integrated circuit using standard cells
摘要 A computer implemented method for designing a semiconductor integrated circuit includes analyzing information of standard cells to be arranged in a chip area based on circuit behavior information so as to generate standard cell information, generating a mega cell including a group of standard cells, based on the standard cell information, and making a layout in which the same patterns repeat in the chip area by arranging a plurality of the mega cells having the same shape, throughout the chip area based on the circuit behavior information.
申请公布号 US2006236273(A1) 申请公布日期 2006.10.19
申请号 US20060392563 申请日期 2006.03.30
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 ISHIGAKI TAKESHI
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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