发明名称 P-CHANNEL MOS TRANSISTOR, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To further increase compression stress to be applied to a channel region by simple configuration in a p-channel MOS transistor capable of improving operation speed by stress application. SOLUTION: Recesses are formed in a source region and a drain region of the p-channel MOS transistor, and these recesses are filled with a compression stress source consisting of a metallic film or a metallic compound film deposited at low temperature. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006278776(A) 申请公布日期 2006.10.12
申请号 JP20050096277 申请日期 2005.03.29
申请人 FUJITSU LTD 发明人 TAMURA NAOYOSHI;KAWAMURA KAZUO;KATAUE AKIRA
分类号 H01L29/78;H01L21/8238;H01L27/092;H01L29/417 主分类号 H01L29/78
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