发明名称 MEMORY CELL DATA READING CIRCUIT, MEMORY CIRCUIT, AND MEMORY CELL DATA READING METHOD
摘要 <p>A memory cell data reading circuit comprising a judgment circuit (3) that reads a plurality of data from multiplexed memory cells (5) the data inverting directions of which are univocal, and that, if different data are existent in the read data, judges the data, which has not been inverted in accordance with the data inverting direction, as legal data stored in the memory cells (5); and an output part (4) that outputs, as data stored in the memory cells, the data that is judged as the legal data by the judgment circuit (3).</p>
申请公布号 WO2006106583(A1) 申请公布日期 2006.10.12
申请号 WO2005JP06343 申请日期 2005.03.31
申请人 FUJITSU LIMITED;ASAKAWA, MASASHI 发明人 ASAKAWA, MASASHI
分类号 (IPC1-7):G06F12/16;G11C29/00 主分类号 (IPC1-7):G06F12/16
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