POWER SEMICONDUCTOR DEVICE AND METHOD THEREFOR CROSS REFERENCE TO RELATED APPLICATIONS

摘要

A power transistor semiconductor die (90) includes a plurality of transistor cells. Each transistor cell has a first electrode coupled to a first electrode interconnection region (58) overlying a first major surface, a control electrode coupled to a control electrode interconnection region (57) overlying the first major surface, and a second electrode coupled to a second electrode interconnection region (60) overlying a second major surface. Each transistor cell has an approximately constant doping concentration in the channel region. A dielectric platform (20) is used as an edge termination of an epitaxial layer (2) to maintain substantially planar equipotential lines therein. The power transistor finds particular utility in radio frequency applications operating at a frequency greater than 500 megahertz and dissipating more than 5 watts of power. The semiconductor die and package are designed so that the power transistor can efficiently operate under such severe conditions.