| 摘要 |
PROBLEM TO BE SOLVED: To provide an I/O controller achieving sufficient data transferring efficiency by reducing overhead relating to processing of description chain information. SOLUTION: A DAM controller 101 incorporates a TD chain storing portion 102 for storing a TD chain. The TD chain storing portion 102 is constituted to be write-accessible from a CPU 11. The DMA controller 101 executes a series of data transferring between a main memory 12 and an I/O device 14 by directly accessing a memory, by successively processing a plurality of transfer descriptors included in the TD chain written in the TD chain storing portion 102 by the CPU 11. COPYRIGHT: (C)2006,JPO&NCIPI
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