发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To obtain a steep dopant profile by decreasing a parasitic resistor in active regions, such as an extension part, etc. in an SOI substrate. SOLUTION: A region for forming a source 32a and a region for forming a drain 32b, and regions for forming extension parts 32c and 32d are made amorphous, then recrystallized, and a dopant is activated by suppressing a thermal diffusion exceeding a solid solution limit. Since the dopant is activated exceeding a solution limit if it does in this way, the parasitic resistance in the active regions, such as the extension parts 32c, 32d, etc. is decreased. Moreover, since the thermal diffusion of the dopant is suppressed and is activated, the most dopant profiles immediately after ion implantation is maintained. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006261232(A) 申请公布日期 2006.09.28
申请号 JP20050073672 申请日期 2005.03.15
申请人 FUJITSU LTD 发明人 MIYASHITA TOSHIHIKO
分类号 H01L29/786;H01L21/265;H01L21/336;H01L29/78 主分类号 H01L29/786
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