| 摘要 |
A semiconductor device that permits an increase in static destruction resistance while preventing an increase in the chip size includes a protective element formed by a polysilicon layer in which JFETs are serially connected in three stages and which is inserted between a gate electrode and source electrode of a power-MOSFET or IGBT semiconductor device. The gate insulation film of a semiconductor active element portion of the semiconductor device is protected regardless of whether the polarity of static electricity or another high voltage is positive or negative.
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