发明名称 A PROGRAMMABLE DIRECT INTERPOLATING DELAY LOCKED LOOP
摘要 Embodiments of the invention provide for a DLL architecture including a coarse-fine type arrangement using one loop for non-continuous strobe that can be also be adapted for continuous clocks as well. In particular, a reference loop establishes precise coarse unit delay. A slave delay line duplicates unit delay. A phase interpolator interpolates between unit delay to produce fine delay.
申请公布号 KR20060100948(A) 申请公布日期 2006.09.21
申请号 KR20067012616 申请日期 2006.06.23
申请人 INTEL CORP. 发明人 RASHID MAMUN UR
分类号 H03L7/099;H03K5/00;H03K5/13;H03K5/135;H03L7/08;H03L7/081 主分类号 H03L7/099
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