Method and circuit for reducing leakage and increasing read stability in a memory device

摘要

A device and method for increasing the read stability of a memory device includes sizing a sleep transistor according to a size ratio of the transistor relative to a driver transistor forming part of the memory device based on a static noise margin value. A leakage reduction circuit and method includes reducing a voltage via a current leakage of a transistor to track the leakage of the memory cells and generating a sleep signal if the voltage drops below a predetermined threshold.