发明名称 DATA TRANSFER SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a data transfer system wherein a bus for DMA transfer is separated from a bus for CPU access to improve the data transfer efficiency and CPU utilizing efficiency. SOLUTION: The data transfer system comprises a main bus 14 and a local bus 15 separated from each other, a DMA controller 4, second slave devices 7, 8 adapted to be bus slaves for both of the main bus 14 and the local bus 15, having interfaces for both of the main bus 14 and the local bus 15, and connected to both of the main bus 14 and the local bus 15, a CPU 1, and first slave devices 5, 6 adapted to be bus slaves only for the main bus 14 and connected to the main bus 14. The DMA controller 4 being a bus master on the local bus 15 performs DMA transfer between the second slave devices 7, 8 via the local bus 15 along with the operation of the CPU 1 being a bus master on the main bus 14. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006244399(A) 申请公布日期 2006.09.14
申请号 JP20050062781 申请日期 2005.03.07
申请人 SHARP CORP 发明人 OKAZAKI MAMORU
分类号 G06F13/28 主分类号 G06F13/28
代理机构 代理人
主权项
地址