发明名称 LOW AMPLITUDE DIFFERENTIAL OUTPUT CIRCUIT AND SERIAL TRANSMISSION INTERFACE
摘要 PROBLEM TO BE SOLVED: To solve a problem of a conventional differential output circuit employing a CMOS circuit that VCM variations with an undesirable magnitude take place due to effects caused by variations in a power supply, temperature and a process or the like. SOLUTION: A low amplitude differential output circuit disclosed herein includes: a pre-buffer circuit 1 for outputting main buffer drive signals MINT / MINB being differential signals by a noninverting drive signal MINT and an inverting drive signal MINB which are complementary to each other; and a main buffer circuit 2 connected to the pre-buffer circuit 1 and for outputting differential output signals OUTT / OUTB in response to the main buffer drive signals MINT / MINB, the amplitude of each of the noninverting drive signal MINT and the inverting drive signal MINB is a voltage between a first level VDD and a second level GND, and the level of each the noninverting drive signal MINT and the inverting drive signal MINB takes the same level between a middle level, of the first level and the second level, and the first level. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006245828(A) 申请公布日期 2006.09.14
申请号 JP20050056675 申请日期 2005.03.01
申请人 NEC ELECTRONICS CORP 发明人 WATARAI SEIICHI
分类号 H03K5/08;H03F1/30;H03F3/45;H03K17/14;H03K17/30;H03K17/687;H03K19/0175;H03K19/0948;H04L25/03 主分类号 H03K5/08
代理机构 代理人
主权项
地址