发明名称 Systems and methods for design verification using selectively enabled checkers
摘要 Systems and methods for performing design verification testing in which test cases are analyzed to determine the characteristics that will be verified in a module under test, and in which the identified characteristics are used to selectively enable checker modules needed to verify the characteristics implicated by the test cases, while disabling other checker modules. In one embodiment, a system includes a test case analyzer and a checker selector. The test case analyzer analyzes one or more test cases and identifies test case characteristics that are associated with each of the test cases. The checker selector is coupled to the test case analyzer and receives identification of the test case characteristics from the test case analyzer. The checker selector then selectively enables a first set of design verification checkers and disables a second set, based on the test case characteristics identified for the test cases.
申请公布号 US2006206840(A1) 申请公布日期 2006.09.14
申请号 US20050074808 申请日期 2005.03.08
申请人 TOSHIBA AMERICA ELECTRONIC COMPONENTS 发明人 IWAMURA KENJI
分类号 G06F17/50 主分类号 G06F17/50
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