摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device verification method and circuit verification apparatus in which an ESD protective circuit can be accurately or speedily or easily verified. SOLUTION: As an equivalent circuit of an ESD protective element constituted of an MOS transistor element; an NMOS transistor MN10, and a parasitic bipolar transistor QN10 accompanying the NMOS transistor connected in parallel between a node D and a node S, current sources Ifgen and Irgen provided respectively among the base of the parasitic bipolar transistor QN10, the node D and the node S, and a substrate resistor Rsub provided between the base of the parasitic bipolar transistor QN10 and a node B corresponding to a substrate node, are used to deform a model expression of the current sources Ifgen, Irgen so as not to diffuse its arithmetic value, and furthermore, a parameter indicative of charge generation and re-coupling is integrated in the model expression. COPYRIGHT: (C)2006,JPO&NCIPI |