发明名称 VIDEO SIGNAL PROCESSING APPARATUS
摘要 <P>PROBLEM TO BE SOLVED: To provide a video signal processing apparatus equipped with a clock generation circuit generating a clock matching the clock frequency of a pixel display while cycles of the clock frequency are constant and a duty is maintained. <P>SOLUTION: The video signal processing apparatus is equipped with a 1st clock generation circuit 102 which generates a 1st clock S102 synchronized with an input signal, a 2nd clock generation circuit 103 which inputs a set value as a reference for an output frequency, adds the set value for each reference clock, extracts data according to a cumulative value, converts the data into an analog signal, reduces quantization noise, and performs multiplication to obtain a 2nd clock S103, and a clock changing circuit 108 which generates a synchronizing signal S108 by using and superposing a synchronizing signal S104 generated with the 1st clock S102, and uses the generated 2nd clock S103 according to the resolution of the pixel display to perform video signal processing. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006235129(A) 申请公布日期 2006.09.07
申请号 JP20050048061 申请日期 2005.02.23
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TANIGAWA SATORU
分类号 G09G5/00;G09G3/20;G09G3/36;G09G5/18;G09G5/391 主分类号 G09G5/00
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