| 摘要 |
The present invention describes a voltage multiplier receiving a constant voltage (Vs). The multiplier comprises means (1) suitable for generating at least one first (CK) and one second (XCK) signal in phase opposition between each other and at least one charging section (100, Ai). The latter comprises a first capacitor (C1) of charge transfer having a first terminal coupled to the first signal (CK) and a second capacitor (C2) of charge transfer having a first terminal coupled with the second signal (XCK). The two capacitors (C1, C2) of charge transfer comprise respective parasitic capacitances (Cp1, Cp2) placed between their first terminal and a reference voltage (GND) and the at least one charging section (100, Ai) is coupled with said constant voltage (Vs) and is suitable for producing in output a multiple voltage of the constant voltage. The multiplier comprises output means (OUT, Cs) receiving said multiple voltage of the input voltage and being suitable for supplying a substantially constant output voltage (Vout) which is multiple of the constant voltage (Vs). The multiplier comprises means (10) suitable for connecting the parasitic capacitances (Cp1, Cp2) to carry out the charge transfer from one parasitic capacitance to the other.
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