| 摘要 |
When a P-channel pass gate transistor is added in parallel to an N-channel pass gate, the resulting circuit improves overvoltage tolerance of an input buffer. A simple bias circuit including two small transistors controls a gate of this P-channel pass gate transistor in such a way that it is turned OFF when an overvoltage is applied, but turned ON when a normal voltage is applied. Another embodiment has two N-channel devices (M 12 , M 13 ) coupled in series with each other and one of the N-channel devices (M 13 ) being configured in a "turned off" position, by coupling the source and gate terminals to a ground voltage (VSS) and providing the supply voltage (VDD) at the gate terminal of another N-channel device (M 12 ), whereby the device M 12 protects the device M 13 from overvoltage.
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