发明名称 |
I/O circuitry shared between processor and programmable logic portions of an integrated circuit |
摘要 |
The present invention provides circuitry and methods for sharing I/O pins between a programmable logic portion and an embedded processor portion of a chip. The circuits in the programmable logic portion and the embedded processor portion can access data signals from and send data signals to the same I/O pins. The data signals are multiplexed to control access to the shared I/O pins. The multiplexers may be controlled by a control signal that determines when particular I/O pins are accessed by the programmable logic portion and the embedded processor portion. Control signals that configure the associated I/O pin circuitry to the correct I/O standard are also multiplexed by the shared I/O circuitry of the present invention. Signals received at the shared I/O pins that are transmitted to the embedded processor portion may be concurrently sent to snoop circuitry within the programmable logic portion.
|
申请公布号 |
US2006186917(A1) |
申请公布日期 |
2006.08.24 |
申请号 |
US20050283402 |
申请日期 |
2005.11.17 |
申请人 |
|
发明人 |
MAY ROGER;KOSTARNOV IGOR;FLAHERTY EDWARD H.;DICKINSON MARK |
分类号 |
H03K19/177 |
主分类号 |
H03K19/177 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|