| 摘要 |
A digital waveform synthesiser ( 1 ) is implemented as a single chip integrated circuit on a single chip ( 2 ) and comprises a direct digital synthesiser ( 10 ) which produces a synthesised output signal waveform on an output terminal ( 4 ) which is substantially phase and frequency locked to the phase and frequency of an externally generated input signal applied to an input terminal ( 5 ). A comparing circuit ( 20 ) compares the period of the synthesised output signal waveform on the output terminal ( 4 ) with the period of the input signal, and a control circuit ( 28 ) produces progressively altered values of a frequency control digital word which are sequentially applied to an accumulator ( 11 ) of the direct digital synthesiser ( 10 ) in response to the comparing circuit ( 20 ), until the value of the frequency control digital word applied to the accumulator ( 11 ) is such as to produce the synthesised output signal waveform to be substantially phase and frequency locked to the phase and frequency input signal applied to the input terminal ( 5 ).
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