发明名称
摘要 PROBLEM TO BE SOLVED: To control an output frequency to a prescribed optional value at input interruption of a reference frequency signal and prevent an upper limit width or a lower limit width of a phase lock range from being narrowed when the characteristic of a voltage controlled oscillator(VCO) is changed due to a temperature change or the like in a phase lock oscillation(PLO) circuit. SOLUTION: In the phase lock oscillation circuit provided with a phase comparator section 9-2 that compares a phase of a signal resulting from frequency-dividing an output signal from the voltage controlled oscillator(VCO) by a frequency divider 9-1 with a phase of an input signal having a reference frequency, with a low pass filter 9-3 and a DC amplifier circuit 9-4, input interruption of the reference frequency signal is detected, a reference voltage of the DC amplifier circuit 9-4 is changed to allow the DC amplifier circuit 9-4 to provide an output of a prescribed voltage so as to output a signal with a substantial center frequency from the voltage controlled oscillator(VCO). Also a reference voltage of the DC amplifier circuit 9-4 is changed in response to a characteristic change in the voltage controlled oscillator(VCO) so as to compensate an upper limit or a lower limit of a phase lock range.
申请公布号 JP3811884(B2) 申请公布日期 2006.08.23
申请号 JP20000343510 申请日期 2000.11.10
申请人 发明人
分类号 H03L7/14;H03L7/093 主分类号 H03L7/14
代理机构 代理人
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