发明名称 Method and apparatus for allocating entries in a branch target buffer
摘要 A method ( 200 ) and apparatus ( 100 ) for allocating entries in a branch target buffer (BTB) ( 144 ) in a pipelined data processing system includes: sequentially fetching instructions; determining that one of the instructions is a branch instruction ( 210, 215, 220 ); decoding the branch instruction to determine a branch target address; determining if the branch target address can be obtained without causing a stall condition in the pipelined data processing system; and selectively allocating an entry of the BTB ( 144 ) based on the determination. In one embodiment, an entry of the BTB ( 144 ) is allocated if the branch instruction is not loaded into a predetermined slot (S 1 ) of a prefetch buffer ( 102 ) and no other stall condition will occur. The method ( 200 ) and apparatus ( 100 ) combine the advantages of using a BTB ( 144 ) and branch lookahead to reduce stall conditions in the data processing system.
申请公布号 US7096348(B2) 申请公布日期 2006.08.22
申请号 US20030736393 申请日期 2003.12.15
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 MOYER WILLIAM C.;SCOTT JEFFREY W.
分类号 G06F9/00;G06F9/38;G06F15/00 主分类号 G06F9/00
代理机构 代理人
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