发明名称 CLAMPING CIRCUIT, AND DIGITAL CAMERA SYSTEM WHICH HAS THE CLAMPING CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a clamp circuit that will not affect clamping precision and draw-in action, when abnormal pedestal level is generated or defective pixel exists in a shaded part. <P>SOLUTION: An output of a subtraction circuit 11 subtracting the output of a D/A converter 18, a compensation signal from the input analog signal to be clamped is connected to an A/D converter 12. The output of the A/D converter is connected to a voltage detector 14, detecting error with the 1st reference voltage 13 referred to a clamping reference voltage; and then the output signal is connected to an equalization circuit 16 capable of controlling the number of times of equalization, while the output of the equalization circuit is connected to the D/A converter 18. The number of times for the equalization of the equalization circuit is controlled by the output signal of a pixel level detector 17 that detects abnormal analog signals from the output signal of a CDS19 which removes the reset noise of solid image sensor or output signal of a PGA20 which controls the gain of the analog signal. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006217469(A) 申请公布日期 2006.08.17
申请号 JP20050030227 申请日期 2005.02.07
申请人 OLYMPUS CORP 发明人 ONO MAKOTO
分类号 H04N5/16;H04N5/335;H04N5/363;H04N5/367;H04N5/378;H04N101/00 主分类号 H04N5/16
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