发明名称 |
Semiconductor integrated circuit and method for laying-out and wiring the semiconductor integrated circuit |
摘要 |
A semiconductor integrated circuit includes a plurality of rows of wired standard cells formed on a semiconductor substrate. The wires standard cells are wired to provide a desired function. Spare standard cells are also formed in each of the plurality of rows in an area in which the wired standard cells are not formed, but are not wired in an initial design. When a change of the function is required, the spare standard cells are wired to achieve a desired additional function. Two power supply lines extend in a direction in which the wired standard cells and spare standard cells are aligned. The wired standard cells and spare standard cells are located between the first power supply line and the second power supply line. Each of the spare standard cells includes a plurality of electrically isolated transistors that may be combined to implement a logic function.
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申请公布号 |
US2006181307(A1) |
申请公布日期 |
2006.08.17 |
申请号 |
US20060345372 |
申请日期 |
2006.02.02 |
申请人 |
SHIBAYASHI KENICHI;KIKUCHI HIDEKAZU |
发明人 |
SHIBAYASHI KENICHI;KIKUCHI HIDEKAZU |
分类号 |
H03K19/177 |
主分类号 |
H03K19/177 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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