发明名称 |
Method and apparatus for determining the optimal fanout across a logic element |
摘要 |
A method of determining an optimal transistor fanout. The method includes creating a sizing model by replacing at least one logic element in a circuit description with a sizing element that includes a dynamic resistor. The method also includes determining a steady state solution to the sizing model and determining at least one transistor fanout from the steady state solution.
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申请公布号 |
US7093217(B1) |
申请公布日期 |
2006.08.15 |
申请号 |
US20030699709 |
申请日期 |
2003.11.03 |
申请人 |
SUN MICROSYSTEMS, INC. |
发明人 |
SIGNORE NICHOLAS D.;WICKMAN CURTIS A. |
分类号 |
G06F9/45 |
主分类号 |
G06F9/45 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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