发明名称 Method and apparatus for efficient semiconductor process evaluation
摘要 A method is described that involves automatically generating a physical behavior curve from a process description; where, the process description describes a process. The method also involves automatically generating a device model for the process from the physical behavior curve; where, the device model is represented in geometric form. The method also involves attempting to automatically generate, with the device model and with a geometric optimization sequence, a circuit design for the process.
申请公布号 US7093205(B2) 申请公布日期 2006.08.15
申请号 US20030412535 申请日期 2003.04.10
申请人 BARCELONA DESIGN, INC. 发明人 HEYDLER THOMAS;DEL MAR HERSHENSON MARIA
分类号 G06F17/50 主分类号 G06F17/50
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