发明名称 Semiconductor device with a hardware mechanism for proper clock control
摘要 A semiconductor device includes a clock generation unit which generates a clock signal, a first module which asserts a clock-control request signal, and one or more second modules, each of which receives the clock signal and the clock-control request signal, and asserts a clock-control acknowledge signal after stopping an operation thereof upon completion of a currently performed operation in response to the assertion of the clock-control request signal, wherein the clock generation unit selectively changes the clock signal supplied to the one or more second modules in response to assertion of all clock-control acknowledge signals output from the one or more second modules.
申请公布号 US7093152(B2) 申请公布日期 2006.08.15
申请号 US20020079903 申请日期 2002.02.22
申请人 FUJITSU LIMITED 发明人 SHIKATA TAKASHI;SATOH TAIZOH;HIJI YOSHIHIRO;HIRATA TAKUYA
分类号 G06F1/06;G06F9/30;G06F1/04;G06F1/32;G06F13/362;G06F13/42;G06F15/78 主分类号 G06F1/06
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