发明名称 Data processing system and method for efficient L3 cache directory management
摘要 A system and method for cache management in a data processing system having a memory hierarchy of upper memory and lower memory cache. A lower memory cache controller accesses a coherency state table to determine replacement policies of coherency states for cache lines present in the lower memory cache when receiving a cast-in request from one of the upper memory caches. The coherency state table implements a replacement policy that retains the more valuable cache coherency state information between the upper and lower memory caches for a particular cache line contained in both levels of memory at the time of cast-out from the upper memory cache.
申请公布号 US2006179250(A1) 申请公布日期 2006.08.10
申请号 US20050055301 申请日期 2005.02.10
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GUTHRIE GUY L.;STARKE WILLIAM J.;WILLIAMS DEREK E.;WILLIAMS PHILIP G.
分类号 G06F12/00;G06F13/00 主分类号 G06F12/00
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