发明名称 METHOD FOR FABRICATING INTERCONNECTION IN AN INSULATING LAYER ON A WAFER AND STRUCTURE THEREOF
摘要 A method for fabricating an interconnection in an insulating layer on a wafer is described. A wafer having a plurality of conductive lines thereon is provided. An insulating layer is formed over the conductive lines. Two via holes are formed in the insulating layer to expose two of the conductive lines waiting to be repaired. A first conductive layer is filled into the via holes to form two pattern marks. A mask is formed over the wafer to cover the insulating layer and the two pattern marks. The mask located above and between the two pattern marks is removed to form a trench exposing the two pattern marks and a portion of the insulating layer. A second conductive layer is formed over the mask to cover the two exposed pattern marks and the exposed insulating layer. The mask and the second conductive layer above the mask are removed simultaneously.
申请公布号 US2006178001(A1) 申请公布日期 2006.08.10
申请号 US20050906168 申请日期 2005.02.05
申请人 LIN STEVEN GS;CHIU SU-PING 发明人 LIN STEVEN GS;CHIU SU-PING
分类号 H01L21/30 主分类号 H01L21/30
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