发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To solve the problem, wherein when a pass transistor is different from a drive transistor in their gate length and gate width, manufacture of a semiconductor memory device becomes complex because the number of parameters to be managed during the manufacture is increased. <P>SOLUTION: An SRAM cell 1 comprises inverters 10, 20; n-type FETs (field effect transistors) 32, 34, 36, 38; word lines 42, 44 and bit lines 46, 48. A gate width W2 and the gate length L2 of the FETs 32, 34, 36, 38 are equal to gate width W3, and the gate length L3 of FETs 12, 22, respectively. In particular, the gate width W4 and the gate length L4 of FETs 14, 24 are also equal to the width W2 (=W3) and to the length L2 (=L3), respectively. That is, the SRAM cell 1 is designed such that W2=W3=W4 and L2=L3=L4. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006210736(A) 申请公布日期 2006.08.10
申请号 JP20050022238 申请日期 2005.01.28
申请人 NEC ELECTRONICS CORP 发明人 ASAYAMA SHINOBU;KOMURO TOSHIO
分类号 H01L27/11;G11C11/412;H01L21/82;H01L21/822;H01L21/8244;H01L27/04;H03K3/356;H03K19/0948 主分类号 H01L27/11
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