发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of a high-reliability circuit operation by suppressing electric charges to be discharged from a holding node via the parasitic capacitance of fuse wirings. <P>SOLUTION: The semiconductor integrated circuit has an internal circuit 200, a fuse circuit 20 for setting the circuit operation of the internal circuit 200, and a protective capacitance 30 to be coupled capacitively to the parasitic capacitance C1 of the fuse circuit 20. This semiconductor integrated circuit is provided with a latching circuit 10 for holding a signal FINT to be made to propagate to the internal circuit 20. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
申请公布号 |
JP2006210398(A) |
申请公布日期 |
2006.08.10 |
申请号 |
JP20050016768 |
申请日期 |
2005.01.25 |
申请人 |
TOSHIBA MICROELECTRONICS CORP;TOSHIBA CORP |
发明人 |
ISHIZUKA KENJI;MURAOKA KAZUYOSHI |
分类号 |
H01L21/82;H01L21/822;H01L21/8242;H01L27/04;H01L27/10;H01L27/108 |
主分类号 |
H01L21/82 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|