发明名称 Memory device
摘要 A memory device an array of memory cells, the array including word lines and bit lines. The memory device also includes managing logic for managing array reading operations that are carried out by executing a step of precharging the bit lines and a step of turning on the word lines. The managing logic includes a control block for generating a first enable signal of the precharge step and a second enable signal of the turning on step such that, within the same reading operation, the precharge and turning on steps are partially concurrent.
申请公布号 US2006171222(A1) 申请公布日期 2006.08.03
申请号 US20050319799 申请日期 2005.12.27
申请人 STMICROELECTRONICS S.R.L. 发明人 BLASI GIANLUCA;VESE BARBARA
分类号 G11C7/00 主分类号 G11C7/00
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