DELAY LOCKED LOOP IN SECONDUCTOR MEMORY DEVICE AND ITS DIVIDED CLOCK GENERATION METHOD,申请号KR20050008447-传众专利搜索

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发明名称	DELAY LOCKED LOOP IN SECONDUCTOR MEMORY DEVICE AND ITS DIVIDED CLOCK GENERATION METHOD
摘要
申请公布号	KR20060087667(A)	申请公布日期	2006.08.03
申请号	KR20050008447	申请日期	2005.01.31
申请人	HYNIX SEMICONDUCTOR INC.	发明人	KIM, KYOUNG NAM;KIM, TAE YUN
分类号	G11C8/18;G11C7/22	主分类号	G11C8/18
代理机构		代理人
主权项
地址

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