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发明名称
A SEMICONDUCTOR INTEGLATED CIRCUIT HAVING TEST FUNCTION AND MANUFACTURING METHOD
摘要
申请公布号
KR20060087430(A)
申请公布日期
2006.08.02
申请号
KR20060008202
申请日期
2006.01.26
申请人
RENESAS TECHNOLOGY CORP.
发明人
SERIZAWA MITSUO;YAMAZAKI KANAME;YAMAMOTO MASAHUMI;KATOU KAZUO
分类号
G11C29/00
主分类号
G11C29/00
代理机构
代理人
主权项
地址
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