VIRTUAL TO PHYSICAL MEMORY ADDRESS MAPPING WITHIN A SYSTEM HAVING A SECURE DOMAIN AND A NON-SECURE DOMAIN
摘要
<p>An apparatus for processing data, the apparatus comprising: a processor operable in a plurality of modes and either a secure domain or a non-secure domain including at least one secure mode being a mode in the secure domain; and at least one non-secure mode being a mode in the non-secure domain. When the processor is executing a program in a secure mode, the program has access to secure data which is not accessible when the processor is operating in a non-secure mode. The processor further includes a non-secure translation table base address register and a secure translation table base address register operable in the non-secure and secure domain, respectively, to indicate a region of memory storing either non-secure or secure domain memory mapping data defining how virtual addresses are translated to physical addresses within either the non-secure or secure domain.</p>
申请公布号
EP1563380(B1)
申请公布日期
2006.07.19
申请号
EP20030811409
申请日期
2003.10.27
申请人
ARM LIMITED
发明人
WATT, SIMON CHARLES;DORNAN, CHRISTOPHER, BENTLEY;ORION, LUC;CHAUSSADE, NICOLAS;BELNET, LIONEL;BROCHIER, STEPHANE, ERIC, SEBASTIEN;MANSELL, DAVID HENNAH;NONWEILER, MICHAEL, ROBERT