Wide window decoder circuit for dual phase pulse modulation

摘要

A dual phase pulse modulation (DPPM) decoder circuit processes a DPPM signal, which is in the form of a series of high and low pulses whose pulse widths represent successive groups of M data bits, so as to recover data carried by the signal. Each of the 2^M possible data values of an M-bit group corresponds to one of 2^M distinct pulse widths. Circuit blocks determine the width of each pulse by piping the DPPM signal through a short delay chain and inputting the delayed outputs and the non-delayed signal into AND logic gates, whose outputs are used to clock flip-flop registers. The registers are reset to a known state at the start of each signal pulse and toggled to an opposite state if clocked. The registered outputs are interpreted by logic to obtain the corresponding M-bit groups.