Multi-bit virtual ground NAND-memory unit, has memory cells of two adjacent groups of rows connected in common

摘要

A multi-bit virtual-ground NAND-memory unit in which each memory cell (MC) has a gate connection, two-source/drain connections and two separate memory sites (SS). Each of the memory sites is adjacent to a source/drain connection and the memory cells of the columns are connected in circuit in series via the source/drain connection. Bit-lines (BL) are spaced from one another along the columns and are arranged mutually parallel to one another. The memory cells of two adjacent groups of rows are connected in common and alternating with one of the bit lines and an adjacent bit line, to form NAND-chains of memory cells of the same column and the same group of rows. Each word-line joins the gate-connections of the memory cells of a row to one another.