发明名称 Semiconductor chip packaging apparatus and method of manufacturing semiconductor chip package
摘要 Example embodiments of a semiconductor chip packaging apparatus and method thereof are disclosed. The packaging apparatus may include a plating unit to perform a conductive plating process to form a conductive plating layer on external terminals of a semiconductor chip package, and a reflow unit adapted to melt the conductive plating layer. The plating unit and reflow unit may be disposed in a single line with the plating module. Thus, it is possible to effectively suppress the growth of whiskers on the plating layer of the external terminals, and to secure economical efficiency, reducing costs, and allowing mass production.
申请公布号 US2006151878(A1) 申请公布日期 2006.07.13
申请号 US20060326192 申请日期 2006.01.06
申请人 发明人 JEONG SE-YOUNG;KIM NAM-SEOG;LEE SUNG-KI;CHOI HEE-KOOK;JEONG KI-KWON;PARK TAE-SUNG;NAKADAIRA YOSHIKUNI;LEE SANG-HYEOP;KIM SUNG-HWAN
分类号 H01L23/48 主分类号 H01L23/48
代理机构 代理人
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