发明名称 SYSTEM AND METHOD FOR NON-UNIFORM CACHE IN A MULTI-CORE PROCESSOR
摘要 A system and method for the design and operation of a distributed shared cache in a multi-core processor is disclosed. In one embodiment, the shared cache may be distributed among multiple cache molecules. Each of the cache molecules may be closest, in terms of access latency time, to one of the processor cores. In one embodiment, a cache line brought in from memory may initially be placed into a cache molecule that is not closest to a requesting processor core. When the requesting processor core makes repeated accesses to that cache line, it may be moved either between cache molecules or within a cache molecule. Due to the ability to move the cache lines within the cache, in various embodiments special search methods may be used to locate a particular cache line.
申请公布号 WO2006072061(A2) 申请公布日期 2006.07.06
申请号 WO2005US47592 申请日期 2005.12.27
申请人 INTEL CORPORATION;HUGHES, CHRISTOPHER;TUCK III, JAMES;LEE, VICTOR;CHEN, YEN-KUANG 发明人 HUGHES, CHRISTOPHER;TUCK III, JAMES;LEE, VICTOR;CHEN, YEN-KUANG
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
主权项
地址